RISC-V - Wikipedia
"RISC-V (pronounced "risk-five") is an open-source hardware instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles.
In contrast to most ISAs, the RISC-V ISA is free and open-source and can be used royalty-free for any purpose, permitting anyone to design, manufacture and sell RISC-V chips and software. While not the first open-architecture[1] ISA, it is significant because it is designed to be useful in a wide range of devices. The instruction set also has a substantial body of supporting software, which avoids a usual weakness of new instruction sets.
The project began in 2010 at the University of California, Berkeley, but many contributors are volunteers and industry workers outside the university.[2]
The RISC-V ISA has been designed with small, fast, and low-power real-world implementations in mind,[3][4] but without over-architecting for a particular microarchitecture style"
RISC-V @ GitHub
info from:
Amazon just acquired Eero because Wi-Fi is key to the smart home - Stacey on IoT | Internet of Things news and analysis
No comments:
Post a Comment